The described embodiments lie generally in the field of digital audio coding and decoding. They relate to a system and method for determining the sample speed mode of a PCM input digital audio data stream.
Audio support is provided for many modem computer, telephony, and other electronics applications. An important component in many digital audio information processing systems is the PCM decoder. Generally, the decoder receives data in a compressed form and converts that data into Pulse-Code Modulated (xe2x80x9cPCMxe2x80x9d) data. The decompressed digital PCM data is then passed on for further processing, such as filtering, expansion or mixing, conversion into analog form, and eventually into audible tones.
One form of compressed audio data is the S/PDIF format, which can be converted to PCM data with a digital audio receiver chip. The standard PCM data formats contain a high rate clock (xe2x80x9cMCLKxe2x80x9d), a sample rate clock (xe2x80x9cLRCKxe2x80x9d), which is used to select between the left and right channel data, a data signal (xe2x80x9cSDATAxe2x80x9d) that contains signal information at the MCLK rate, and a sample signal (xe2x80x9cSCLKxe2x80x9d), which latches in the data signal. This method allows audio samples with various sample rates and bits per sample to be input to Digital-to-Analog Converters (xe2x80x9cDACsxe2x80x9d) in a serial fashion.
Sampling rates of 48 khz, 96 khz, and 192 khz are common and will be referred to in this specification as single-speed, double-speed, and quad-speed sampling modes, respectively. To convert the PCM data properly, DACs must be set to sample the incoming data at the proper rate. In the prior art, DACs have used programmed bits in a register or have used external pin settings to set their properties according to the speed sampling mode of the incoming PCM or other input format data stream.
Described herein are embodiments by which the speed-sampling mode can be detected from the incoming PCM digital audio stream. The compressed data stream, such as an S/PDIF data stream, may include overhead information which specifies the speed-sampling mode, but that information could be incorrect. To verify the correctness of information, and in such cases where the overhead information is corrupted or not provided, it is advantageous to be able to determine the speed sampling mode based on the intrinsic PCM clock signals, for example, based on the ratio of the MCLK to LRCK clocks. Further, being able to determine the sample speed mode frees the DAC, ADC, or CODEC from having to receive that information from the digital audio receiver or microcontroller to which it is connected.
The method and system described automatically detects and sets the correct speed-sampling mode based on the intrinsic decoded PCM clock signals. The described method and system can be independent of user input and compressed data format.